Challenges of Hardware Chips Based on Post-Quantum Cryptographic and Physical Security Requirements (Q20c)
This talk will focus on the challenges on product development based on post-quantum cryptographic hardware. The speaker will discuss performance metrics, physical security requirements, agility, as well as deployment challenges of post-quantum cryptography in embedded devices. The speaker will also discuss requirements from various emerging technologies such as RISC-V and integration into real-world applications with open-source hardware. Finally, the speaker will discuss assurance and its important for hardware accelerators implementing post-quantum cryptography.